Abstract

A fast integrated electronic chain is presented to read out the cathode pad array of a multiwire photon detector for a fast RICH counter. Two VLSI circuits have been designed and produced. An analog eight-channel, low-noise, fast, bi-polar current preamplifier-amplifier and discriminator chip serves as the front-end detection electronics. It has an rms equivalent noise current of 10 nA, 50 MHz bandwidth with 10 mW of power consumption per channel. Two analog chips are coupled to a digital sixteen-channel CMOS readout chip, operating at 20 MHz with a power consumption of 6 mW per channel. Readout of a 4000 pad sector requires 2–3 μs, depending on the number of hit pads. The full RICH counter is made up of many such sectors, read out in parallel. The minimum time needed to separate successive hits on the same pad is 70 ns. The conception of the digital chip and its properties are fully presented in this report. The analog chip is described in less detail since it will be fully covered in a forthcoming paper.

Highlights

  • Particle identifying RICH counters at high-luminosity hadron colliders (Tevatron, LHC, SSC, Eloisatron) will require fast, pixel photon detectors sensitive to UV light and capable of opera tion in a high multiplicity environment at interaction rates up to 100 M}-Iz

  • These photodetectors are fast with small time dis persion but they require a large number of pixels to uniquely determine the photoconversion points

  • They are well suited for use at high—lurninosity hadron colliders because the fast timing avoids mixing events from successive beam crossings

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Summary

Introduction

Particle identifying RICH (ring imaging Cherenkov) counters at high-luminosity hadron colliders (Tevatron, LHC, SSC, Eloisatron) will require fast, pixel photon detectors sensitive to UV light and capable of opera tion in a high multiplicity environment at interaction rates up to 100 M}-Iz. Since the produced photoelectrons are reflectively in jected back into the atmospheric pressure carrier gas, the same amplifying structures used for gaseous track ing detectors (MWPC or PPAC) can be used to detect single electrons from photocathodes These photodetectors are fast with small time dis persion (tr, = 10-20 ns for TEA or TMA, o, = 1 ns for CsI or CsI/TMAE) but they require a large number of pixels (electronic channels) to uniquely determine the photoconversion points. The design and operation of the digital CMOS chip is fully presented in this paper These chips are con nected to form a two-dimensional array of 3840 chan nels per sector. Tests of the readout chain are reported followed by a summary and conclusions

Mechanical conception of the detector
The cathode pad rear plane and implantation of the electronics
READOUT Ammo wr CHIP 0
General description and charactensttbs
Characteristic test results
II E 60
Data acquisition
I0 I5 20 ZS 30
50 MH: CLK
Bufer mode operation
Row address reconstmctian and data apanstbn
Data readout - top bus output
Data readout time
Readout initialization
5.10. Pin diagram of the digital chip
5.11. Tests of the digital chip
Tests of the readout chain on the detector
A I tn NI
Noise measurement versus threshold level
Time resolution and two-hit separation
Single photoelectmn detecdon emcieney
Findings
Summary and conclusions

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