Abstract
A fast measurement methodology to extract, in a single stress sequence, four different circuit-relevant degradation parameters is introduced. The methodology is used to compare the degradation of the linear and saturation drain currents, as well as the linear and saturation threshold voltages, during positive bias temperature instability (BTI) (PBTI) in metal-gate/high- <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">k</i> (MG/HK) nFETs and during negative BTI (NBTI) in conventional poly-Si/SiON pFET devices. No <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">gm</i> degradation is observed for PBTI in MG/HK nFET devices, whereas <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">gm</i> degradation is evident for NBTI in conventional poly-Si/SiON pFETs. Furthermore, the impact of measurement delay on parameter correlation is investigated, leading to important conclusions regarding the physical origin of <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">gm</i> degradation during BTI stress.
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