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https://doi.org/10.1109/iscas.2004.1329272
Copy DOIPublication Date: May 23, 2004 |
Citations: 12 |
MPEG-4 shape coding comprises context-based arithmetic encoding (CAE) as its centerpiece. Since the CAE algorithm has complicated coding procedure and strong data dependency, it is hard to exploit its pipeline and parallel facilities. This paper presents a fast dual symbol CAE that runs at a higher clock rate whereas requires less clock cycle count for encoding. The proposed design is based on the unique characteristics of shape information as well as the numerical properties of the probabilities indexed by the contexts, and it is capable of encoding either a singe symbol or two symbols within each clock cycle. Together with the adaptive predication for the order of coding process, redundant operations can be skipped and therefore the average clock cycles for each coding process is improved by a factor of 1.72. Furthermore, the probability table is rearranged to reduce critical path delay. When synthesized from Verilog RTL design by using TSMC 0.35 /spl mu/m 1P4M CMOS technology, the design with I/O pads occupies an area of 2528/spl times/2520 /spl mu/m/sup 2/and is capable of running at 100 MHz.
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