A Fast Architecture-Level Thermal Analysis Method for Runtime Thermal Regulation

Abstract

As power consumption and the corresponding heat dissipated on a die grow rapidly, efficient on-chip temperature regulation becomes imperative for today's high performance microprocessors. Temperature tracking based on the on-chip thermal sensors is not sufficient as the temperature hot spots keep changing with the load. One way to mitigate this problem is by means of software sensors, where temperature of any location is computed based on realtime power information and calibrated with the physical sensors. In this paper, we present a very efficient numerical thermal analysis method, which is suitable for fast temperature tracking and runtime thermal regulation. The proposed method, called FEKIS, combines two existing numerical techniques: extended Krylov subspace reduction technique to reduce the thermal circuit complexity and large-step integration method to exploit the sampled-based power input traces, which is typical in the power traces at the architectural and operation system levels. Experimental results show that FEKIS archives 10x speedup over recently proposed state-of-the art thermal moment matching technique 1,2 and the precise time-step integration method only, and three orders of magnitude faster than the traditional numerical integration method with high accuracy.