Abstract
The growth of the blockchain-based cryptocurrencies has attracted a lot of attention from a variety of fields, especially in academic research. One of them is Bitcoin, the most popular and highest valued cryptocurrency on the market. The SHA256 is the main processing part in Bitcoin mining, to date the difficulty of which is extremely high and still increases relentlessly. Hence, it is essential to improve the speed of the SHA256 cores in the Bitcoin mining system. In this paper, we propose a two-level pipeline hardware architecture for the SHA256 processing. The first-level pipeline helps the system reduce the number of operating cycles. Besides, the maximum frequency of the system is boosted by the second-level pipeline. The proposed hardware is implemented on FPGA Xilinx Virtex 7-VC707 (28 nm technology). The mining hash rate using the proposed pipeline SHA256 cores reaches 514.92 MH/s that improves 2.4 times compared to the FPGA based conventional technique. The throughput of SHA core of current study is 296.108 Gbps that is 240 times higher compared to the standard technique. The proposed architecture is also implemented in an ASIC design using ROHM 180 nm CMOS technology, which resulted in a throughput of 69.28 Gbps that is 18 times higher than that of conventional work implemented in Intel 14 nm process.
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