Abstract

The conditional switching of memristors to execute stateful implication logic is an example of in-memory computation to potentially provide high energy efficiency and improved computation speed by avoiding the movement of data back and forth between a processing chip and memory and/or storage. Since the first demonstration of memristor implication logic, a significant goal has been to improve the logic cascading to make it more practical. Here, we describe and experimentally demonstrate nine symmetry-related Boolean logic operations by controlling conventional Ta/TaOx/Pt memristors integrated in a crossbar array with applied voltage pulses to perform conditional SET or RESET switching involving two or three devices, i.e., a particular device is switched depending on the state of another device. We introduce a family of four stateful two-memristor logic gates along with the copy and negation operations that enable two-input-one-output complete logic. In addition, we reveal five stateful three-memristor gates that eliminate the need for a separate data copy operation, decreasing the number of steps required for a particular task. The diversity of gates made available by simply applying coordinated sequences of voltages to a memristor crossbar memory significantly improves stateful logic computing efficiency compared to similar approaches that have been proposed.

Highlights

  • A Family of Stateful Memristor Gates for Complete Cascading LogicAbstract— The conditional switching of memristors to execute stateful implication logic is an example of in-memory computation to potentially provide high energy efficiency and improved computation speed by avoiding the movement of data back and forth between a processing chip and memory and/or storage

  • A FTER a physical mechanism that exhibited the currentvoltage ‘pinched hysteresis loop’ of the memristor mathematical model first formulated by Chua [1] was described in 2008 by Strukov et al [2], researchers have invented various methods for computation and logic that utilize the nonlinear dynamical resistance switching characteristic of this fundamental circuit element [3], [4]

  • We describe the functioning of four symmetry-related two-memristor logic gates (IMP, OR, AND and NIMP) based on standard Ta/TaOx/Pt memristors in a cross bar array [17], [18], and introduce the COPY and NOT operations required for logic cascading derived from these gates

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Summary

A Family of Stateful Memristor Gates for Complete Cascading Logic

Abstract— The conditional switching of memristors to execute stateful implication logic is an example of in-memory computation to potentially provide high energy efficiency and improved computation speed by avoiding the movement of data back and forth between a processing chip and memory and/or storage. We describe and experimentally demonstrate nine symmetry-related Boolean logic operations by controlling conventional Ta/TaOx/Pt memristors integrated in a crossbar array with applied voltage pulses to perform conditional SET or RESET switching involving two or three devices, i.e., a particular device is switched depending on the state of another device. The diversity of gates made available by applying coordinated sequences of voltages to a memristor crossbar memory significantly improves stateful logic computing efficiency compared to similar approaches that have been proposed

INTRODUCTION
STATEFUL TWO-MEMRISTOR LOGIC GATES
NON-DESTRUCTIVE TWO-MEMRISTOR LOGIC CASCADING
STATEFUL THREE-MEMRISTOR LOGIC GATES
EXPERIMENTAL DEMONSTRATION OF THE BASIC GATES
FULL ADDER EXECUTION
Findings
CONCLUSIONS
Full Text
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