A dynamic source–drain extension MOSFET using a separately biased conductive spacer

Abstract

A new approach to control short-channel effects is demonstrated using a conductive spacer formed over a compensated-channel region. Placed adjacent to (but isolated from) the gate stack, the conductive spacer functions as an auxiliary gate and is biased independently from the principal gate. This arrangement is shown to behave as a dynamic source–drain extension (DSDE) MOSFET. This auxiliary gate is able to invert a portion of the channel adjacent to the LDD on both the source and the drain side, decreasing the effective channel length during the “on” state. Consequently, the transistor appears to have a longer effective gate length during the “off” state and a shorter gate length during the “on” state. Using technology computer-aided design simulations, we show four orders of magnitude reduction in I OFF (at a given I DSAT) using the conductive spacer device. Conductive spacers provide a useful continuum for scaling transistors to the next generation. It is predicted that nanoscale pass gates with I OFF values as low as 1 pA/μm are attainable with DSDE MOSFETs.