Abstract
Branch predictor is a key component of processor, which can improve the efficiency of instruction execution. The branch predictor based on machine learning algorithm can achieve high branch prediction accuracy, but it has the disadvantages of long training time and high access delay. As a neural network algorithm, Recurrent Neural Network (RNN) is good at processing data related to time series, and can learn the correlation between data faster. Sliced Recurrent Neural Network (SRNN) parallelizes the RNN algorithm, effectively reducing the access delay of the RNN algorithm. In this paper, a dynamic branch predictor based on parallel structure of SRNN is proposed to accelerate the training time and reduces the computing delay. The optimal design parameters of predictor, which has prediction accuracy with lower source cost, are selected through a serial simulations. The experimental results show that the branch predictor proposed in this paper has higher prediction accuracy than the traditional Bimod and Gshare branch predictors under the same hardware consumption, and its branch prediction rate is 2.34% higher than the traditional Perceptron neural predictor in the short learning period.
Highlights
The branch predictor is an important part of a modern processor
The experimental results show that the dynamic branch predictor proposed in this paper based on Sliced Recurrent Neural Network (SRNN) algorithm has a higher prediction accuracy than the traditional Bimod [21], [22] and Gshare [23] dynamic branch predictor under the same hardware consumption, and its branch prediction rate in the ‘‘learning period’’ with shorter training time is 2.34% higher than the traditional Perceptron [5] neural predictor
Full connection and other kinds of neural network algorithms, Recurrent Neural Network (RNN) is good at processing data related to time series
Summary
The branch predictor is an important part of a modern processor. A high precision branch predictor can improve performance and reduce power consumption by reducing the number of instructions executed on the wrong path [1], [2]. Tarsa et al proposed a branch predictor based on a convolutional neural network in [11], which improves the prediction accuracy of branch instructions that are difficult to predict. This paper constructs a dynamic branch predictor based on SRNN algorithm by using two-level prediction model [17], [18] to improve the prediction accuracy of ‘‘learning period’’ and optimizes the hardware access delay. The experimental results show that the dynamic branch predictor proposed in this paper based on SRNN algorithm has a higher prediction accuracy than the traditional Bimod [21], [22] and Gshare [23] dynamic branch predictor under the same hardware consumption, and its branch prediction rate in the ‘‘learning period’’ with shorter training time is 2.34% higher than the traditional Perceptron [5] neural predictor.
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