A dual-critic DQN architecture for lifter assignment in multi-floor semiconductor FAB

Abstract

This paper proposes a deep reinforcement learning-based lifter assignment algorithm utilising Deep Q-network (DQN) to minimise the total inter-floor delivery time in semiconductor manufacturing. Given the complexities and randomness inherent in manufacturing environments, predicting delivery times poses a significant challenge for companies operating in such domains. To address this challenge and improve the accuracy of delay prediction, we partition the end-to-end delivery process of individual lot systematically, focusing on predicting segment delays rather than the overall end-to-end delay. We introduce a unique dual critic architecture designed to handle these segmented steps. This innovative approach enhances accuracy by capturing nuanced information at each step, which is stored as trajectories. Simulation results substantiate the effectiveness of the proposed architecture, comparing favorably against existing algorithms. We conduct comparative analyses with benchmark algorithms, revealing that the proposed algorithm outperforms other algorithms.