A DSTATCOM Topology With Reduced DC-Link Voltage Rating for Load Compensation With Nonstiff Source

Abstract

The distribution static compensator (DSTATCOM) is used for load compensation in power distribution network. In this paper, a new topology for DSTATCOM applications with nonstiff source is proposed. The proposed topology enables DSTATCOM to have a reduced dc-link voltage without compromising the compensation capability. It uses a series capacitor along with the interfacing inductor and a shunt filter capacitor. With the reduction in dc-link voltage, the average switching frequency of the insulated gate bipolar transistor switches of the DSTATCOM is also reduced. Consequently, the switching losses in the inverter are reduced. Detailed design aspects of the series and shunt capacitors are discussed in this paper. A simulation study of the proposed topology has been carried out using power systems computer-aided design simulator and the results are presented. Experimental studies are carried out to verify the proposed topology.