A dominator path scheduler for deep pipeline architectures

Abstract

There are many different instruction scheduling techniques that are used in compilers today. The most frequently used one is the list scheduling. It is easy to implement and gives good results in most cases. It works on the basic block level. According to Fisher and Rau instruction level parallelism that can be achieved using this technique cannot be greater then 2. Architectures with deep pipeline can run much more instructions in the same cycle and global scheduler techniques can give better results. In our tests we used a dominator path scheduler with three different strategies for choosing the scheduling paths. Our application encoded sound to the mp3 format, and was run on a digital signal processor with a deep pipeline. Using these scheduling techniques, our C compiler generated 10% fewer NOP instructions compared to local instruction scheduling. In addition, this implementation of a dominator path scheduler was used on a C compiler for SUN Sparc processors (for testing purposes only), and it was shown that the same implementation of the scheduler can be used for different platforms.