Abstract
A sampled-data model for a thyristor controlled series capacitor compensated system is derived for use in stabilizing controller design for subsynchronous modes of oscillation. The model is a refinement of the existing models based on the Poincare/spl acute/ mapping techniques already developed in the literature. The special features of the model are to increase the sampling frequency to six times the synchronous frequency and to directly express the small signal variation of the state of the whole system on the variation of the thyristor firing angles. The effectiveness of the model is shown by using it to design an all stabilizing controller for the IEEE First SSR Benchmark Model.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
