A Digital Polar CMOS Power Amplifier With a 102-dB Power Dynamic Range Using a Digitally Controlled Bias Generator

Abstract

A digitally modulated CMOS power amplifier (DPA) for a polar transmitter with a high dynamic range is presented. To improve local oscillator (LO) leakage, which limits the minimum output power of the DPA, the unit amplifier cell of the DPA employs a balanced mixer-type LO canceller at the power stage and a virtual ground is introduced in the layout of the output-power combining networks. A high dynamic range of the output power is simply achieved by adjusting gate-bias voltage of a cascode transistor in each power amplifier (PA) cell using a digitally controlled bias generator. This architecture allows a few-mA drain current at a low Tx power level without degrading the linearity. An array of unit PA cells is segmented to have a 10-bit amplitude resolution, and the bias generator is designed to have 8-bit control of the average output power. The peak output power is 24.4 dBm with an overall efficiency of 43% at 800 MHz. The total output dynamic range is 102.8 dB. A simple static pre-distortion helps the DPA achieve an average efficiency of 35% with a root mean square error vector magnitude of 3.59% while delivering linear output power of 22 dBm for WCDMA. The range of the digital transmit-power control for the WCDMA signal is 49.7 dB. This chip is fabricated in a 65-nm RF CMOS process.