Abstract
A digital quadrature modulator with a bandpass /spl Delta//spl Sigma/-modulator is presented that interpolates orthogonal input carriers by 16 and performs a digital quadrature modulation at carrier frequencies f/sub s//4, -f/sub s//4, (f/sub s/ is the sampling frequency). After quadrature modulation, the signal is converted into an analogue IF signal using a bandpass /spl Delta//spl Sigma/ modulator and a 1-bit D/A converter. The die area of the chip is 5.2 mm/sup 2/ (0.13 /spl mu/m CMOS technology). The total power consumption is 139 mW at 1.5 V with a clock frequency of 700 MHz. (D/A converter full-scale output current 11.5 mA).
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