Abstract
A 7 to 15 GHz low noise amplifier (LNA) in 0.13-mum CMOS is reported. The two-stage fully differential LNA delivers a peak gain of 13 dB and a minimum noise figure of 3.1 dB while consuming 32 mW from a 1.5 V supply. The implemented LNA shows a quadratic improvement of 1-dB compression point with frequency as predicted analytically. The effect of the input matching inductor (on-chip spiral versus wirebond) and also the electrostatic discharge protection circuitry on the LNA performance have been verified experimentally.
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