Abstract
In this brief, decision-feedback equalization (DFE) receiver for multidrop single-ended signaling is described. The proposed DFE receiver adopts a reference voltage having equalization information to remove channel intersymbol interference. It uses a smaller number of DFE tap elements than the conventional DFE receiver for the same level of equalization, resulting in reduced power consumption and silicon area, particularly for multi-input/output interface. The proposed DFE receiver was fabricated in a 0.13- μm CMOS process, whose evaluation results indicate a reliable operation up to 3.40-Gb/s data rate with reduced power consumption.
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