Abstract
In the last three decades, Scaling of complementary metal-oxide semiconductor (CMOS) technology been gateway to continual development in the silicone basis semiconductor industry. Nevertheless, as technology scaling reaches the nanometer system, CMOS devices face many serious issues such as enhanced leakage currents, on-current difficulties, large variations in parameters, poor reliability and yield, higher manufacturing costs, and so on. The Tunnel field-effect transistor (TFET) suggested as a most propitious option compared to CMOS devices. TFET is suitable because of its steep slope possibilities and the corresponding benefits in functioning at limited supply voltage. In this paper, we explored different interface structures related to the Double Gate TFET(DG-TFET) and Triple Gate TFET(TG-TFET).
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
