Abstract
This paper describes a readout IC (ROIC), which consists of a capacitively coupled instrumentation amplifier (CCIA) and a discrete-time delta–sigma modulator. An active high-pass filter is embedded in the ripple reduction loop to suppress the noise ripple amplitude due to chop modulation. To accommodate the input with large electrode offset, dc-servo loop (DSL) and a 6 bit capacitive DAC are employed to suppress large electrode offset, while a positive feedback loop to boost its input impedance. The complete CCIA is implemented in a standard 0.18 μm 1P6M CMOS process. It occupies an area of 0.56 mm2 (including DSL) and consumes 52 μA current from a 3.3 V supply voltage. Measurement results indicate that the input reference noise PSD is 53.8 nV√Hz.
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