Abstract
This paper proposes a new technique and design methodology on a transformer-based Class-E complementary metal-oxide-semiconductor (CMOS) power amplifier (PA) with only one transformer and two capacitors in the load network. An analysis of this amplifier is presented together with an accurate and simple design procedure. The experimental results are in good agreement with the theoretical analysis. The following performance parameters are determined for optimum operation: The current and voltage waveform, the peak value of drain current and drain-to-source voltage, the output power, the efficiency and the component values of the load network are determined to be essential for optimum operation. The measured drain efficiency (DE) and power-added efficiency (PAE) is over 70% with 10-dBm output power at 2.4 GHz, using a 65 nm CMOS process technology.
Highlights
With the explosive growth of wireless and mobile communication systems adoption, the demand for compact, low-cost and low power portable transceiver has increased dramatically
This paper presents an analysis and design methodology on transformer-based class-E power amplifier (PA) involving the circuit equations, the relationships among the transistors switching “on-off” and the load quality factor (Q) at the resonant frequency ( f o ) of the load network, The basic performance and design parameters are discussed in this paper as well
Fabricated in GLOBALFOUNDRIES’ 65 nm complementary metal-oxide-semiconductor (CMOS) process, and it occupies an area of 0.49 × 0.43 mm2 including the I/O pads
Summary
With the explosive growth of wireless and mobile communication systems adoption, the demand for compact, low-cost and low power portable transceiver has increased dramatically. The class-E PA as depicted in Figure 1 has a maximum theoretical efficiency of 100% It consists of a single output transistor that is driven as a switch and a passive load network. In class-E PA, the circuit operation is determined by the transistor when it is on, and by the transient response of the load network when the transistor is off [2] It greatly reduces the transistor power losses during the off-to-on transition of the device, resulting in high efficiency. In the conventional class-E PA, the RF-choke (RFC) is assumed to have a sufficiently high reactance and the output current through the load resistor R L is essentially a sinusoid at fundamental frequency Under these conditions, the analytical design equations can be derived and are given by [4]:. Experimental results are demonstrated and they are in good agreement with the theories
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