A design approach of higher oscillation VCO made of CS amplifier with varying active load

Abstract

This article proposes a design approach of common source (CS) amplifier based Voltage Controlled Oscillator (VCO) to derive higher oscillation frequency. The working feature is such that, the active load of CS amplifier is varied to modulate the flow of current based on a bias circuit steered by an external controlled voltage (Vctrl), which controls the delay of each stage and thereby regulates the oscillation frequency. The circuit is designed and analyzed on Cadence Virtuoso platform at a supply voltage of 1.2 V for 90 nm CMOS to read a device footprint of 0.105 mm2, which offers a power burn and frequency of 2.092 mW and 9.21 GHz respectively with a phase noise and output noise of − 137.9 dBc/Hz and − 168.40 dB at 1 MHz offset frequency. To justify the reliability of the circuit we have conducted worst case analysis by considering effect of power delivery network (PDN) and corner variation along with 500 runs of Monte Carlo. The design is also introduced under 28 nm UMC to validate its scalability with technology trends.