A decoder architecture for high-speed free-space laser communications

Abstract

We present a decoding architecture for high-speed free-space laser communications. This system will be used by NASA's Mars Laser Communication Demonstration (MLCD) project, the first use of high-speed laser communication from deep space. The Error Correction Code (ECC) and modulation techniques for this project have been motivated by an analysis of capacity, and existing designs have been shown to operate within 0.9 dB of the Shannon limit on the nominal operating point. In this paper, we give the algorithmic description and FPGA implementation details that led to the development of a 50 Mbps hardware decoder.