A deadlock-free physical mapping method on the many-core neural network chip

Abstract

Many-core neural network chip is widely developed and used for both the deep learning and neuromorphic computing applications. Many-core architecture brings high parallelism while makes the model-to-core mapping intractable. In order to decrease the routing time, transmission packets amount and energy consumption, along with deadlock-free performance for inter-core data movement, we formulate an optimization problem for the physical mapping under the routing strategies with point-to-point and multicast paths. The Weighted Communication of Application(WCA) is defined as the objective function and simulated annealing algorithm incorporated with two deadlock-free constraints is designed to solve the mapping problem. Multi-layer perceptron(MLP) and convolutional neural network(CNN) applications are used for evaluation. Experimental results show that the proposed algorithm is quite efficient saving the routing time and power comsumption for inter-core communication, and the routing diversity has been significantly improved, the hotspot paths are greatly reduced after optimization, compare with the baseline of zigzag and neighbor mapping.