Abstract
Moving data between various components of a system is fast becoming the performance bottleneck in digital design today. This is especially true in high-throughput, memory-intensive applications, like those in multimedia and video processing. With improved fabrication technology, the capacities of application-specific integrated circuits (ASICs) that implement these digital systems are increasing as well. Higher levels of design abstraction are used to prevent the design process from becoming untenable. High-level synthesis (HLS) is one such level of abstraction. We present Midas, an HLS system for ASIC design that treats the data produced and used by a system very differently from any previous HLS system. Midas uses a novel model for HLS centered around data-transfers (DTs), instead of operations as is more traditional. Midas also incorporates floorplanning information within the main HLS flow. The consideration of data-transfers and floorplanning during synthesis allows Midas to design architectures whose storage units and execution units show a close temporal and spatial integration. Data is stored near where it is produced and used. DTs happen over short distances instead of long ones. The total effect is better utilization of internal DT bandwidth on the ASIC.
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