Abstract

We describe a one‐bit full‐adder based on Josephson tunnel junctions and fabricated by photolithographic techniques. The design employs current‐switched gates with latching characteristics, direct‐coupled control currents and parallel fanout. The linewidths are 25 μm. Simulated and indirectly measured delays/gate are approximately 100 psec.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call