Abstract
A very low voltage CMOS RMS-DC converter is designed based on MOS Translinear techniques. Its main building blocks are a squarer/divider and a geometric-mean cell, which are obtained by using simple second-order MOS Translinear loops, leading to a very regular and compact implementation. The biasing employed for such loops allows to operate them at supply voltages as low as 1.5 V. Measurement results demonstrate the practicality of the circuit.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have