A current direction sense technique for multi-port SRAMs

Abstract

Single-end sense amplifiers which do not require a reference voltage would be most desirable for multi-port SRAMs. This paper describes a current-direction sense circuit which transforms current direction into a logic value. It operates 4 times faster than a CMOS inverter, and with it it is possible to produce single-end 200 MHz 64 Kb SRAMs whose total power consumption is nearly as low as that required for the memory cell currents alone in conventional SRAMs. Also presented is a write bit-line swing control circuit which uses a memory cell replica to reduce bit-line and word-line swing. When this circuit is applied to be used in a 200 MHz 64 Kb SRAM, it is possible to reduce by one-third the power consumption required for bit-line driving and pseudo-read cell current (0.25 /spl mu/m CMOS).