Abstract
The paper describes a square-loop magnetic-core/junction-transistor circuit-element which is suitable for operation in complex logical systems at medium digit rates. Temporary storage between logical operations is obtained by virtue of the remanent property of the core. Use is made of the constant-current pulse from each stage and the field threshold of the material to provide a number of the elementary logical operations by the method of analogue summation of field inputs. Regenerative connection of each stage enables the power requirements of the master pulse trains to be considerably reduced. For flexible operation the input to each stage is strobed, so that the input/output characteristic is improved and output-pulse-length variation is overcome. Some examples of the applications of the element are given, and the limitation on its use is explained. A modified form of the basic circuit is described which enables shift-register circuits based on the single-core-per-bit principle to be constructed. Generalized design data are given, and the results are evaluated for components currently available.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callMore From: Proceedings of the IEE - Part B: Radio and Electronic Engineering
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
