Abstract
Grafcet is a widely used model for the specification of logic control in manufacturing systems. Compared to other modelling tools for Programmable Logic Controllers (PLC), it has the advantages of manipulating simple concepts which are commonly used by control agents and engineers. This paper presents an approach based on the use of the “Timed Transition Model (TTM)/Real-Time Temporal Logic (RTTL)” formalism as a support to the analysis and verification of’ properties of automated systems whose controllers are specified using Grafcet. The modelled system is mapped into a TTM, and a dedicated proof system, based on abstractions and heuristics, is used for the validation of safety, liveness and timeliness properties expressed in RTTL.
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