Abstract

Nonlinear simulations of semiconductor networks, in both the time and the frequency domains, determine the accuracy of analog CAD tools. Conventional circuit simulators such as SPICE provide nonlinear simulation only in the time domain. Analysis outputs are often verified by the frequency-domain nonlinear harmonic balance (HB) techniques. However, inconsistency between the individually developed tools would easily invalidate this simulation/verification process. In addition, the HB algorithms also suffer from many convergence problems which exclude HB from general applications. The authors present a compiler-based design framework in association with the improved HB algorithms to provide consistent nonlinear simulations. Simulation algorithms are formulated directly on unified modeling primitives which are then used to construct device models. Application examples and simulation results are presented to demonstrate the effectiveness of the proposed methodology. >

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