Abstract
This paper addresses a fundamental question on the physics of negative bias temperature instability (NBTI). Besides interface states, is oxide trapped charge (i.e., trapped holes) generated concurrently by NBTI stress? The discussion is made against a backdrop of critical questions, evolving from recent studies, which challenge the validity of the charge pumping method used commonly for quantifying and differentiating interface states from an oxide trapped charge. An objective and systematic analysis of dc current-voltage data reveals a broad energy distribution of stress induced positive trap states. Relative difference in the energy levels of these positive trap states determines their role as either interface states (trap states in the Si bandgap) or oxide trapped charge (deep-level trap states near and above the Si conduction band edge). This framework satisfactorily explains many electrical characteristics, known hitherto, of an NBTI-stressed p-MOSFET without specific regard to the exact origin of the traps. However, distinct relaxation characteristics of deep-level positive trap states, as compared to those of the interface states, imply a fundamental difference in the origin of these traps. Under positive gate biasing, the density of interface states is unchanged, but the density of deep-level positive trap states is significantly reduced. Electrical behavior of the deep-level positive trap states is shown to conform to that of oxide traps, implying that these trap states arise from hole trapping. However, a detailed temperature dependence study indicates that the mechanism, which is responsible for the generation of a substantial portion of the positive trap charge, has a very small activation energy (0.02 eV). This observation suggests that the generation of a significant portion of the positive trap charge is neither due to the breaking of bonds nor is rate-limited by matter transport. A possible mechanism involving a negative-field-induced loss of electronic charge from nitrogen donors is proposed.
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More From: IEEE Transactions on Device and Materials Reliability
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