A configurable high resolution digital pixel readout integrated circuit with on-chip image processing

Abstract

Readout Integrated Circuits (ROICs) are used to process the signal from a detector array in amaging systems. The important performance factors for ROICs, among others, include image resolution, power consumption and reconfigurability. However, the existing ROICs target only a single or few performance parameters at a time. Furthermore, the off-chip image processing in state-of-the-art methods increases the parasitic effects. The on-chip image processing solutions have also been proposed previously, but either with a low resolution or analog processing. To overcome these issues, this article presents a high resolution and low power configurable Digital Readout Integrated Circuit (DROIC) with on-chip image processing. The proposed DROIC has been designed for a digital pixel array of 1K × 1K with 10 um pixel pitch, using 65 nm CMOS process.