Abstract

—Electrocardiogram (ECG) processors for healthcare have been widely used, however most of them can only adapt to specific applications, lacking flexibility. For achieving scalable on-chip ECG classification, a flexible inference engine based on one-dimensional (1-D) convolutional neural network (CNN) is proposed. By utilizing the proposed computing strategy based on systolic arrays, filter level parallelism and output channel parallelism are achieved. The configurable processing units (PUs) and modifiable instruction registers allow this inference engine to support computing of 1-D convolutional layers or fully connected layers with different scales. Based on the proposed data buffers system with multi-level storage structure, the input feature values and weight values are reused, thereby reducing hardware overhead and memory access power. This design has been validated on FPGA using our proposed two arrhythmia classification models that represent low energy consumption and high accuracy requirements, achieving accuracy of 98.9% and 99.3%, respectively, with energy consumption of 2.05 μJ and 14.27 μJ per classification at 200 MHz. The hardware implementation results indicate that good configurability enables our design to adapt to different ECG classification scenarios, effectively improving the hardware universality in mobile healthcare applications.

Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call