Abstract
A quantitative trapping model is introduced to describe the electrical properties of a semiconductor-grain-boundary-semiconductor (SGBS) barrier in polysilicon films over a wide temperature range. The grain-boundary scattering effects on carrier transport are studied analytically by examining the behavior of the height and width of a rectangular grain-boundary potential barrier. The model also verifies the applicability of a single-crystal band diagram for the crystallite within which an impurity level exists. Carder transport includes not only thermionic field emission through the space-charge potential barrier resulting from trapping effects and through the grain-boundary scattering potential barrier but also thermionic emission over these barriers. Thermionic emission dominates at high temperatures; however, at low temperatures, thermionic field emission becomes more important and the grain-boundary scattering effects are an essential factor. By characterizing the experimental data of the I-V characteristics, resistivity, mobility, and carrier concentration, this model enhances the understanding of the current transport in polysilicon films with grain sizes from 100 A to 1 µm, doping levels from 1 × 1016to 8 × 1019cm-3, and measurement temperatures from -176 to 144°C. The limitations of the model are also discussed.
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