A Computer Aided Design Methodology For Printed Circuit Boards

Abstract

We present a design methodology for realizing VLSI printed circuit board (PCB) designs using Computer Aided Design (CAD) tools on powerful workstations. The workstation and CAD tools allow one to create a gate-level design using TTL parts and interconnecting wires, simulate the functionality and timing of the gate-level design using TTL parts and interconnecting wires, simulate the functionality and timing of the gate-level design, package the designs TTL parts into PCB parts, place and route the PCB, create manufacturing data, and simulate the design at the board-level. A design example, the VLSI-PLM PC Board being developed at the University of California at Berkeley, is given to illustrate this procedure. The VLSI-PLM PC Board is a processor board for the VLSI-PLM Chip [SRINI], which is a high performance CMOS processor for executing computer programs written in the Prolog language.