A Comparison of CPU and GPU Implementations for the LHCb Experiment Run 3 Trigger

R Aaij,S Mariani,A Szabelski,M Alexander,R Vazquez Gomez,P Fernandez Declara,M Calvo Gomez,G Bassi,X R Lyu ,A Piucci,M Adinolfi,S Filippov,S Hansmann-Menzemer,E Polycarpo,P D’Argent,K Klimaszewski,F Pisani,O Zenaiev,H Stevens,S Borghi,O Lupton,W Hulsbergen,C R Jones,H Mu,M S Rangel,Marc Szymanski ,M Pepe Altarelli,M Santimaria,X Cid Vidal,Daniel Hugo Cámpora Pérez ,S Akar,M J Morello,C Prouvé ,D Hill,M P Blago,P Robbe,J Albrecht,S Stahl,S Amato,F Lazzari,M Saur,R J Hunter,Elisabet Golobardes ,S Klaver,A S Boldyrev ,B Sciascia,J A B Coelho,Tomasz Wojtoń ,Olga Madejczyk ,A Lupato,L Sun,D Martínez Santos ,L Grillo,V Renaudin,M Stahl,J Hu,R Le Gac,F Reiss,M Ramos Pernas,G Tuci,Д Деркач ,A M Hennequin,D Zhang,Y Xie,M Lucio Martínez ,T Colombo,L Zhang,P Muzzetto,V V Gligorov,F Ratnikov,S Vecchi,X Zhu,R Lane,L Henry,R Schwemmer,P Spradlin,M Kucharczyk,J F Marchand,D Y Tou,A Ryzhikov,A Poluektov,G Raven,J H Lopes,S Easo,M Witek,M Petruzzo,A Dzyuba,F Dordei,T Boettcher,M Frank,L Pica ,M Mazurek,G Graziani,N Neufeld,A Dziurda,M Ponni Bala ,A Oyanguren,N Skidmore,T Szumlak,D C Craik,M Whitehead,M Vesterinen,S Aiola,M D Sokoloff,F Suljik,V Chobanova,A Contu,G Ciezarek,N Neri,P Naik,Dorothea Vom Bruch ,Z Wang,M Hushchyn,F Polci,R Kopecna,D S Mitzel,P Gandini,A Cardini,S Esen,A Usachov,F Archilli,L Calefice ,D P O’hanlon ,L Bian,X Vilasis‐Cardona ,M Needham,R Matev,M Schiller,J L Cobbledick,R Quagliani,F Machefert,S E Hollitt,W Krzemień ,C Marín Benito ,L Dufour,P Durante,Ao Xu ,S Malde,Y Amhis,A Brea Rodríguez ,M Zdybał ,G Punzi,N Valls Canudas,R Currie,S Petrucci,M De Cian,C Fitzpatrick,P A Günther,M Cattaneo,F Martínez Vidal ,M Dorigo,B Couturier,B K Jashal,H Yin,N S Nolte,B Mitreska,A Solomin,R I Rabadán Trejo ,M Williams,P Li,Null Author_Id

doi:10.1007/s41781-021-00070-2

Abstract

The Large Hadron Collider beauty (LHCb) experiment at CERN is undergoing an upgrade in preparation for the Run 3 data collection period at the Large Hadron Collider (LHC). As part of this upgrade, the trigger is moving to a full software implementation operating at the LHC bunch crossing rate. We present an evaluation of a CPU-based and a GPU-based implementation of the first stage of the high-level trigger. After a detailed comparison, both options are found to be viable. This document summarizes the performance and implementation details of these options, the outcome of which has led to the choice of the GPU-based implementation as the baseline.

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