A comparative study on the forming methods of chalcogenide memristors to optimize the resistive switching performance

Abstract

Most of the memristor devices require an electroforming step to initiate resistance switching in them. Electroforming a pristine memristor could alter the material composition and/or the device structure, thereby, altering its electrical resistance. This acts as a vital step to optimize the devices for memory applications. In this work, commercially available Ge2Se3 chalcogenide memristors have been characterized electrically. In these devices, the active layer is sandwiched between a tungsten bottom electrode and a silver top layer, and their operation is based on the migration of silver ions into the active layer. Different electroforming methods, such as the use of sinusoidal signal, linear voltage sweep, linear current sweep, constant voltage bias, and fast voltage pulse have been applied to form pristine memristors and their effects on memristor performance has been studied. A current sweep signal cannot provide high enough electric field to obtain a reasonable ON/OFF ratio during forming. In fact, forming using this method is found to be redundant since the subsequent voltage sweep for device operation itself acts as a forming step. Forming with a constant bias signal provides the information regarding switching times and forming rate can be controlled. However, devices formed using this method are found to show unpredictable switching behaviour and it is challenging to choose the suitable voltage level for forming. The devices formed using positive voltage sweep method have been found to give the most repeatable switching characteristics. This method is essential to study the switching mechanism and current conduction in the device during the operation. On the other hand, ultra-fast voltage pulses form the memristor at a much faster rate in comparison to the other DC forming methods, however, at the cost of using a higher voltage level.