A comparative study of digital low dropout regulators

Abstract

Granular power management in a power-efficient system on a chip (SoC) requires multiple integrated voltage regulators with a small area, process scalability, and low supply voltage. Conventional on-chip analog low-dropout regulators (ALDOs) can hardly meet these requirements, while digital LDOs (DLDOs) are good alternatives. However, the conventional DLDO, with synchronous control, has inherently slow transient response limited by the power-speed trade-off. Meanwhile, it has a poor power supply rejection (PSR), because the fully turned-on power switches in DLDO are vulnerable to power supply ripples. In this comparative study on DLDOs, first, we compare the pros and cons between ALDO and DLDO in general. Then, we summarize the recent DLDO advanced techniques for fast transient response and PSR enhancement. Finally, we discuss the design trends and possible directions of DLDO.