Abstract

AbstractIn this paper, a novel wideband low noise amplifier (LNA) operating in the 9–23 GHz frequency range is presented. The proposed LNA design utilizes a combination technique consisting of pole‐tuning technique, shunt resistive‐capacitor negative feedback, and gate‐capacitive peaking technique to achieve significant bandwidth extension while maintaining acceptable overall performance. For verification, a one‐stage triple‐stacked LNA using the combination technique is designed and implemented in a 0.18‐μm SiGe BiCMOS heterojunction bipolar transistor (HBT) process. The fabricated prototype demonstrates a peak gain of 13.8 dB at 19.5 GHz, minimum noise figure of 3.1 dB at 14 GHz, 3‐dB bandwidth of 14 GHz, and a fractional bandwidth of 87.5%, while consuming a dc power of 39.6 mW. Moreover, the chip occupies a small silicon area of 0.39 mm2 including all testing pads with a core size of only 0.192 mm2.

Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call