Abstract
A compact 140 GHz power amplifier (PA) with employed multi-layer stacked transformer (MLST) matching network is implemented in a 65-nm CMOS process. The employed MLST matching network adopts two metal layers as the primary coil and one single layer as the secondary coil to increase the coupling factor and decrease the insertion loss (IL) of the matching network at D-band frequency range. Besides, a gain-boosting unit is further introduced in the first stage of the PA to enhance the power gain. The proposed 140 GHz PA achieves a measured PAE of 6.9%, a Psat of 10.5 dBm and an OP1dB of 7.03 dBm with a maximum power gain of 27.6 dB when the gain-boosting unit turns off. By turning on the gain-boosting unit, the power gain managed to increase from 27.6 dB to 31 dB with stability. Furthermore, modulation measurement shows that the proposed D-band PA supports 24 Gb/s 64-QAM and 11.2 Gb/s 128-QAM modulated signals with error vector magnitudes (EVM) of -23.1 dB/-22.87 dB at the output power of 7 dBm, respectively. The core chip area and dc power consumption of the PA are only 0.0275 mm and 170 mW.
Published Version
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