A Communication-Centric Design Flow for HIBI-Based SoCs

Abstract

This paper describes a design flow for Systems-on-Chip(SoCs) utilizing a previously presented HIBI communication network. The system designer is assisted with an automated two-level architecture exploration that optimizes the component allocation, task mapping and scheduling with static application analyses, and dynamic simulations. The utilization of a system-level model of computation enables fast analysis of the design and facilitates automated architecture exploration. Communication design is in a key role in the design flow since it is a critical part of contemporary SoCs. The platform of the design flow is based on the HIBI communication network that is easily scalable and parameterizable for a variety of communication requirements. As a result, the design flow selects the computational component from library, HIBI network instance and application mapping that optimizes the result of cost function. The designer assists the flow by defining the cost function and optimization control parameters as well as giving the architecture and mapping constraints.