Abstract

In this article, a new large-signal transistor model is proposed. The model combines the advantage of both compact modeling and behavioral modeling techniques, resulting in a new modeling methodology. The intrinsic part of the model is based on the black-box poly-harmonic distortion (PHD) framework, which is implemented using the canonical piecewise linear (CPL) functions. Thus, the new intrinsic model can cover a broad operating frequency band, across a wide range of input powers, using a compact set of model parameters. While at each fixed operating frequency and input power, the model can also accurately predict device behavior over the complete Smith chart. For the extrinsic model, the traditional extrinsic parasitic network is used, enabling access to the intrinsic device plane, as required for waveform engineering. This work examines intrinsic admittance domain models implemented using both the linear and quadratic poly-harmonic expansions. An <inline-formula> <tex-math notation="LaTeX">$8 \times 125\,\,\mu \text{m}$ </tex-math></inline-formula> GaN HEMT device with a 0.25-<inline-formula> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> gate feature size and a commercial 10-W GaN HEMT is used during the simulation and experimental model validation. Model implementations show excellent interpolation and extrapolation capability over the frequency band across a range of input power levels in both the frequency domain and the time domain.

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