A combined BIT chip strategy applicable for complicated circuit condition monitoring

Abstract

Widely applied for monitoring electronic equipment condition, the technology of built-in test (BIT) is the basis for Prognostics and health management (PHM) of electronic equipment. There are various different BIT design methods, but also some problems, such as the discrepancy between equipment function and BIT design, etc. This further leads to BIT afunction, difficulty in verification, uncontrollability of size, weight, and power consumption, and so on. This paper proposes a new combined BIT chip strategy applicable for plate circuit condition monitoring. And the purpose of this strategy is to realize the integration of equipment functions with BIT. Furthermore, this strategy can solve the difficulty in monitoring the condition of complicated circuit board integrating microwave circuit, analog circuit and digital circuit. The strategy contains three main innovation points. Firstly, standardized chip is adopted to ensure BIT signal acquisition and transmission and reduce test cost of BIT design; secondly, a design of combining optional function modules is adopted to meet the needs of testability analysis of electronic system and optimize BIT test cost; thirdly, a design of central chip combination is adopted to meet the needs of monitoring microwave, analog and digital functions of plate circuit. Experiments show that the combined BIT chip design strategy for complicated plate circuit proposed herein is superior to traditional separated BIT method in respect of size, weight, power consumption and BIT functional integrity for monitoring the condition of plate circuit of good testability.