A Collocation-Based Algorithm for Computing the Pull-In Range of a Class of Phase-Locked Loops

Abstract

The pull-in range (ωp) of a phase-locked loop (PLL) is defined as the maximum value of loop detuning ω0s for which pull-in occurs from anywhere on the PLL's phase plane. That is, pull-in is guaranteed from anywhere on the phase plane if ω0s <ω p. Simple approximation is available for computing ωp for the high gain PLL where saddle-node bifurcation occurs at ω0s = ωp. Unlike the high gain case, a simple approximation for ωp is not available for the low gain case where bifurcation from a separatrix cycle occurs at ω0s = ωp. The vector field model for a class of second-order PLLs is shown to have rotational properties, which imply the existence of a separatrix cycle. The external stability of this separatrix cycle is an indicator of the type of bifurcation (saddle- node or separatrix cycle) which terminates the limit cycle associated with the PLL's stable false lock state and the PLL pulls-in (i.e. achieve phase lock). A formula is given for determining the separatrix cycle's stability, which indicates that the separatrix cycle is externally stable for small values of closed loop gain. A collocation- based algorithm is presented for computing the PLL's separatrix cycle and the value of pull-in range frequency ω0s = ωp at which a stable separatrix cycle exists.