A CMOS voltage controlled oscillator topology for suppression of flicker noise up-conversion

Abstract

A CMOS voltage controlled oscillator (VCO) topology is proposed to suppress the flicker noise up-conversion, thus improving its close-in phase noise performance. The idea is based on a previous work relying on insertion of resistors in series with the conducting channel resistors of the complementary cross coupled pairs. The immunity of the loaded quality factor (Q) to the conducting channel resistors which are modulated by their flicker noise is enhanced, thus reducing the flicker noise up-conversion gain. In the proposed topology, the VCO oscillation amplitude is not degraded and the resistance is never constrained by the threshold voltage, which are problems of the previous topology. Meanwhile the number of resistors is halved, lowering circuit complexity. Two VCOs based on the previous topology and the proposed topology are designed in a 65nm CMOS process. Simulation results show the phase noise of the proposed VCO is improved by more than 4dB at 1kHz offset frequency and 2dB at 10kHz offset frequency over the whole 2.85GHz to 3.75GHz tuning range.