A CMOS variable gain low-noise amplifier with ESD protection for 5 GHz applications

Abstract

This paper presents a variable gain low-noise amplifier (VG-LNA) for 5 GHz applications. The effect of the input parasitic capacitance on the inductively degenerated common source LNA's input impedance is analyzed in detail. A new ESD and LNA co-design method was proposed to achieve good performance. In addition, by using a simple feedback loop at the second stage of the LNA, continuous gain control is realized. The measurement results of the proposed VG-LNA exhibit 25 dB (−3.3 dB to 21.7 dB) variable gain range, 2.8 dB noise figure at the maximum gain and 1 dBm IIP3 at the minimum gain, while the DC power consumption is 9.9 mW under a 1.8 V supply voltage.