Abstract

A capacitive pressure sensor has been implemented by the industrial standard 0.8μm CMOS (Complementary metal oxide semiconductor) process. The device layout follows the entire set of CMOS IC (Integrated circuit) design rules. The sensing capacitor of the capacitive pressure sensor is composed of the upper metal (metal 2) and the polysilicon layer. The lower metal layer (metal 1) serves as the sacrificial layer. After completing the standard CMOS process, three CMOS‐compatible post‐processing steps were applied. First, phosphoric acid was used to etch the sacrificial layer to release the membrane of the capacitive pressure sensor. Second, PECVD (Plasma enhanced chemical vapor deposition) nitride was utilized to seal all access holes. Finally, RIE (Reaction ion etching) was used to remove nitride on the membrane. The dimensions of the capacitive pressure sensor are 1.0mm×0.9mm. This pressure sensor operates linearly in the range of 0 ∼ 200kPa, and the sensitivity is 0.07mV/kPa.

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