Abstract
SUMMARY This paper presents the design of a CMOS RF Power Detector (PD) using 0.18µm standard CMOS technology. The PD is an improved unbalanced source coupled pair incorporating an output differential amplifier and sink current steering. It realizes an input detectable power range of −30 to −20 dBm over 0.1–1 GHz. Also it shows a maximum data rate of 30 Mbps with 2 pF output loading under OOK modulation. The overall current consumption is 1.9 mA under a 1.5 V supply.
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