A CMOS power amplifier with reconfigurable power cells and matching network for 2.4 GHz wireless communications

Abstract

This paper presents a twelve-mode 130 nm CMOS power amplifier with reconfigurable output matching network (OMN) and supply voltage selection. To select operation modes, nine inputs enable or disable individually a set of power cells in the power stage and capacitors in the OMN. The gain stage is a cascode structure while the power stage is composed of three differently sized parallel cascode power cells with a voltage supply ranging from 1.1 V to 1.8 V. The OMN is composed of two reconfigurable capacitor banks and a fixed inductor. Each bank is composed of three capacitance cells. When a different combination of power cells is enabled, the OMN is altered to match impedances and so improve efficiency. The low-power mode achieves an output 1 dB compression point (OCP1dB) of 10.1 dBm, a DC power (PDC) consumption of 94.7 mW, and 10.6% power added efficiency (PAE) at OCP1dB. The high-power mode achieves an OCP1dB of 18.22 dBm, 341.4 mW PDC and 19.4% PAE at OCP1dB. Employing IEEE 802.11n, IEEE 802.11ax and LTE signals for each mode, digital channel simulations were performed to determine the maximum output power in compliance with the respective Error Vector Magnitude and Adjacent Channel Power Ratio.