Abstract

This article proposes a CMOS lock-in pixel image sensor aiming for time-resolved near-infrared spectroscopy (TR-NIRS). The pixel employs lateral electric field charge modulation (LEFM) with an eight-tap multisimultaneous gate structure and negative substrate bias. The optimization of pixel structure creates a high potential slope with no barrier to facilitate the high-speed photo-generated charge transfer required in the time-resolved application. The sensor employs a two-stage charge transfer architecture with pinned storage diodes (SDs). The effectiveness of the sensor is demonstrated through simulations and experimental measurements. A prototype sensor with 70 (V) <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\times110$ </tex-math></inline-formula> (H) effective pixels to characterize the multisimultaneous gate lock-in pixel is implemented in a 0.11- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> 1-poly-4-metal CMOS image sensor (CIS) technology. A fast intrinsic response of 240 ps is achieved using an 80-ps pulsewidth 780-nm laser diode by the characterization using two simultaneous gates and a single time window of the lock-in pixel. Performance evaluation using silicon phantoms and further measurement with a rat demonstrates the feasibility of the proposed sensor and setup for TR-NIRS applications.

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