A CMOS gate driver with ultra-fast dV/dt embedded control dedicated to optimum EMI and turn-on losses management for GaN power transistors

Abstract

In this paper, a CMOS gate driver in $180\mathrm {n}\mathrm {m}$ technology is presented. The gate driver implements an integrated and independent ultra-fast $\mathrm {d}\mathrm {V}/\mathrm {d}\mathrm {t}$ control circuit dedicated to manage switch-on transients for $\mathrm {G}\mathrm {a}\mathrm {N}$ HEMT technology. In order to mitigate a detrimental effect in EMI spectrum for wide bandgap transistors, a novel method to reduce $\mathrm {d}\mathrm {V}/\mathrm {d}\mathrm {t}$ without increasing so much switching losses is proposed. A comprehensive benchmark with the classical method is also presented, where the gate driver resistance is typically adjusted. Simulations are conducted to show the feasibility of the proposed method and the amount of switching energy that can be saved. Time responses of a feedback loop lower than $200\mathrm {p}\mathrm {s}$ are expected. The preliminary characterization of the integrated CMOS circuit is shown.